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N08L63W2A
8Mb Ultra-Low Power Asynchronous CMOS SRAM
512K × 16 bit
Overview
The N08L63W2A is an integrated memory device
containing a 8 Mbit Static Random Access Memory
organized as 524,288 words by 16 bits. The device
is designed and fabricated using ON
Semiconductor ’s advanced CMOS technology to
provide both high-speed performance and ultra-low
power. The device operates with two chip enable
(CE1 and CE2) controls and output enable (OE) to
allow for easy memory expansion. Byte controls
(UB and LB) allow the upper and lower bytes to be
accessed independently and can also be used to
deselect the device. The N08L63W2A is optimal
for various applications where low-power is critical
such as battery backup and hand-held devices.
The device can operate over a very wide
temperature range of -40 o C to +85 o C and is
available in JEDEC standard packages compatible
with other standard 512Kb x 16 SRAMs
Features
? Single Wide Power Supply Range
2.3 to 3.6 Volts
? Very low standby current
4.0μA at 3.0V (Typical)
? Very low operating current
2.0mA at 3.0V and 1μs(Typical)
? Very low Page Mode operating current
1.0mA at 3.0V and 1μs (Typical)
? Simple memory control
Dual Chip Enables (CE1 and CE2)
Byte control for independent byte operation
Output Enable (OE) for memory expansion
? Low voltage data retention
Vcc = 1.8V
? Very fas t output enable access time
25ns OE access time
? Very fast Page Mode access time
t AAP = 25ns
? Automatic power down to standby mode
? TTL compatible three-state output driver
Product Family
Part Number
Package Type
Operating
Temperature
Power
Supply
(Vcc)
Speed
Standby Operating
Current (I SB ), Current (Icc),
Typical Typical
-40 o C to +85 o C 2.3V - 3.6V 85ns @ 2.3V
N08L63W2AB
N08L63W2AB2
48 - BGA
48 - BGA Green
70ns@2.7V
4 μ A
2 mA @ 1MHz
Pin Configuration
Pin Descriptions
1
2
3
4
5
6
Pin Name
Pin Function
A
B
C
D
E
LB
I/O 8
I/O 9
V SS
V CC
OE
UB
I/O 10
I/O 11
I/O 12
A 0
A 3
A 5
A 17
NC
A 1
A 4
A 6
A 7
A 16
A 2
CE1
I/O 1
I/O 3
I/O 4
CE2
I/O 0
I/O 2
V CC
V SS
A 0 -A 18
WE
CE1, CE2
OE
LB
UB
Address Inputs
Write Enable Input
Chip Enable Input
Output Enable Input
Lower Byte Enable Input
Upper Byte Enable Input
F
I/O 14 I/O 13
A 14
A 15
I/O 5
I/O 6
I/O 0 -I/O 15
Data Inputs/Outputs
G
H
I/O 15
A 18
NC
A 8
A 12
A 9
A 13
A 10
WE
A 11
I/O 7
NC
V CC
V SS
Power
Ground
48 Pin BGA (top)
8 x 10 mm
?2008 SCILLC. All rights reserved.
July 2008 - Rev. 8
NC
Not Connected
Publication Order Number:
N08L63W2A/D
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